Design-Reuse

Synopsys Enhances DesignWare Synthesizable IP for AMBA 2 and AMBA 3 AXI Protocols

MOUNTAIN VIEW, Calif. -- April 25, 2007-- Synopsys, Inc. (Nasdaq: SNPS - News), a world leader in semiconductor design software, today announced the 2007.04a release of DesignWare® synthesizable ...
Design-Reuse

Silistix Self-Timed Interconnect Solution Adds Support for AXI Bus Protocol

Extends Designer Use of Popular AMBA Buses for Asynchronous Interconnect on SoCs SAN JOSE, CA -- July 17, 2006 -- Silistix, a provider of innovative software for on-chip communications solutions, ...
EDN

Self-timed interconnect solution supports AXI bus protocol

SAN FRANCISCO — EDA and intellectual property (IP) startup Silistix Ltd. has added support for the on-chip AMBA AXI bus protocol to the company's synthesized self-timed interconnect technology, ...
Semiconductor Engineering

Moving From AMBA ACE to CHI For Coherency

Introduced back in 2011, ACE (AXI Coherency Extensions) grew from the existing AXI protocol to satisfy the cache coherency maintenance demands of SoCs with multi core processors and shared caches in ...
Business Wire

ARM AMBA 4 Specification Maximizes Performance and Power Efficiency

CAMBRIDGE, U.K.--(BUSINESS WIRE)--ARM [(LSE: ARM); (Nasdaq: ARMH)] today announced availability of phase one of the new AMBA® 4 specification, providing increased functionality and efficiency for ...
EDN

Building a better memory controller: architectural performance exploration of an AXI memory controller

Communicationbetween processors and memories is often a major bottleneck, making the designof the memory controller a critical task in determining overall system-levelperformance. The memory ...
Semiconductor Engineering

Mixing Interface Protocols

Continuous and pervasive connectivity requires devices to support multiple interface protocols, but that is creating problems at multiple levels because each protocol is based on a different set of ...