We’ve been following the open, royalty-free RISC-V ISA for a while. At first we read the specs, and then we saw RISC-V cores in microcontrollers, but now there’s a new board that offers enough ...
SiFive, the RISC-V chip IP firm, raised $400m in an oversubscribed Series G led by Atreides and backed by Nvidia, valuing it ...
The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...
With Arm slated to start trading on the Nasdaq this week, investors are looking at potential risks for the company. While analysts told CNBC it's not an immediate threat, Arm itself warned that if it ...
Many of Intel’s current woes can be traced to the fact that the company was left out of the iPhone. Whether Intel passed on the opportunity or couldn’t meet the spec is by now a moot point, but ...
In brief: China is making a major push for RISC-V processor designs as it intensifies efforts to reduce reliance on Western semiconductor technology. New government policies appear to be shifting the ...
SAN MATEO, Calif.--(BUSINESS WIRE)--SiFive, Inc., the founder and leader of RISC-V computing, today announced it has been selected by NASA to provide the core CPU for NASA’s next generation ...
SiFive's oversubscribed series G round of financing suggests the industry's historical caution around the RISC-V architecture ...
RISC-V vendors are beginning to aim much higher in the compute hierarchy, targeting data centers and supercomputers rather than just simple embedded applications on the edge. In the past, this would ...
Canonical announced today it's collaborating with SpacemiT (Hangzhou) Technology Co., Ltd. in an effort to make Ubuntu run on SpacemiT's RISC-V systems-on-chip (SoCs) that use the RVA23 profile. The ...
The Android Common Kernel is about to remove support for the RISC-V architecture. Android Common Kernel is Google’s fork of the upstream Linux kernel but with Android-specific additions. RISC-V is an ...
The DeepComputing DC-ROMA RISC-V Mainboard is built around the open-source RISC-V instruction set architecture (ISA), providing a platform for experimentation and customization. Its modular design and ...